|13040611||Digital System design WITH PLDs and VHDL||L||T||P||C|
|Version1.1||Date of Approval: Jun 06, 2013||3||1||0||3|
- To gain an in-depth understanding of VHDL and to realize different circuits using it both sequential and combinational.
- To learn the concept of memories and how they are designed using VHDL.
- To gain an understanding of applications of VHDL in PLDs and Field Programmable Logic Arrays(FPGAs).
On completion of this course, the students will be able to
- explain VHDL as a programming language.
- Design the combinational and sequential logic circuits using VHDL.
- design Programmable logic devices(PLDs) and Networks of Arithmetic operations.
- Gain proficiency with VHDL software package and utilize software package to solve problems on a wide range of digital logic circuits.
The VHSIC Hardware Description Language (VHDL) is an industry standard language used to describe hardware from the abstract to the concrete level. VHDL usage has risen rapidly since its inception and is used by literally tens of thousands of engineers around the globe to create sophisticated electronic products. VHDL is a powerful language with numerous language constructs that are capable of describing very complex behaviour.The main applications of VHDL are in field of Programmable logic devices. The language provides support for modeling the system hierarchically and also supports top-down and bottom-up design methodologies. The system and its subsystems can be described at any level of abstraction ranging from the architecture level to gate level. Precise simulation semantics are associated with all the language constructs, and therefore, models written in this language can be verified using a VHDL simulator.
- Stephen Brown and Zvonko Vranesic,” Fundamentals of Digital Logic with VHDL Design” , Mc-Graw-Hill (2nd edition).ISBN-10: 0077211642
- Peter J. Ashenden, “Designers guide to VHDL “,Morgan Kaufman Publishers. 3rd edition, ISBN-10: 0120887851
Unit I: Introduction
7 lecture hours
INTRODUCTION to Hardware Description Languages (HDL) and HDL based design, VHDL- Variables, Signals and constants, Arrays, VHDL operators, VHDL functions, VHDL procedures, Packages and libraries, VHDL description of combinational networks, Modeling flip-flops using VHDL, VHDL models for a multiplexer, Compilation and simulation of VHDL code, Modeling a sequential machine, VHDL model for a counter.
Unit II: VHDL Synthesis and Models
6 lecture hours
Attributes, Transport and Inertial delays, Operator overloading, Multivalued logic and signal resolution, IEEE-1164 standard logic, Generics, Generate statements, Synthesis of VHDL code, Synthesis examples, Files and TEXTIO.
Introduction to data path and control path synthesis.
Unit III: Digital Design with State Machine Charts
8 lecture hours
State machine charts, Derivation of SM charts, Realization of SM charts. Implementation of the dice game, Alternative realization for SM charts using microprogramming, Linked state machines, Asynchronous state machine based design.
Unit IV : Programmable Logic devices (PLDs)
9 lecture hours
DESIGNING WITH PROGRAMMABLE LOGIC DEVICES: Read-only memories (ROM, EPROM, EEPROM/FLASH), Programmable logic arrays (PLAs), Programmable array logic (PLAs), Other sequential programmable logic devices (PLDs), Design of a keypad scanner.
DESIGN OF NETWORKS FOR ARITHMETIC OPERATIONS: Design of a serial adder with accumulator, State graphs for control networks, Design of a binary multiplier, Multiplication of signed binary numbers, Design of a binary divider.
Unit V: Field Programmable Gate Arrays (FPGA
9 lecture hours
Xlinx 3000 series FPGAs, Designing with FPGAs, Xlinx 4000 series FPGAs, using a one-hot state assignment, Altera complex programmable logic devices (CPLDs), Altera FELX 10K series COLDs.
Representation of floating-point numbers, Floating-point multiplication, Other floating-point operations.
Mode of Evaluation: The theory performance of students are evaluated.
Relationship between the Course Outcomes (COs) and Program Outcomes (POs)
|Mapping between Cos and POs|
|Sl. No.||Course Outcomes (COs)||Mapped Programme Outcomes|
|1||explain VHDL as a programming language.||1|
|2||Design the combinational and sequential logic circuits using VHDL.||3|
|3||design Programmable logic devices(PLDs) and Networks of Arithmetic operations.||3|
|4||Gain proficiency with VHDL software package and utilize software package to solve problems on a wide range of digital logic circuits.||5|
|Engineering Knowledge||Problem analysis||Design/development of solutions||Conduct investigations of complex problems||Modern tool usage||The engineer and society||Environment and sustainability||Ethics||Individual or team work||Communication||Project management and finance||Life-long Learning|
|TEC362||Digital System Design using VHDL||1||2||2||4|
1=addressed to small extent
2= addressed significantly
3=major part of course
|Theory||The theory of this course is used to evaluate the program outcome PO(5)|