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Syllabus | B. Tech. Electronics & Communication Engineering | ASIC Design

13040614  ASIC Design L T P C
Version1.0 Date of Approval: — 3 1 0 3

Course Objectives 

  1. To study the design flow of different types of ASIC.
  2. To familiarize the different types of programming technologies and logic devices.
  3. To gain knowledge about partitioning, floor planning, placement and routing including circuit extraction of ASIC
  4. To analyse the synthesis, Simulation and testing of systems.
  5. To know about different high performance algorithms and its applications in ASIC

Course Outcomes

  1. After completing this course, the student would have gained knowledge in the circuit design aspects at the next transistor and block level abstractions of FPGA and ASIC design.
  2. In combination with the course on CAD for VLSI, the student would have gained sufficient theoretical knowledge for carrying out FPGA and ASIC

Catalog Description

An application-specific integrated circuit (ASIC)  is an integrated circuit  (IC) customized for a particular use, rather than intended for general-purpose use. Application-specific standard products (ASSPs) are intermediate between ASICs and industry standard integrated circuits like the7400 or the 4000 series .As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 gates to over 100 million.

Text Books

  1. J.S.Smith, ” Application – Specific Integrated Circuits”, Pearson,2003
  2. Douglas J. Smith, HDL Chip Design, Madison, AL, USA: Doone Publications, 1996

Reference Books

  1. K.Chan & S. Mourad, Digital Design Using Field Programmable Gate Array, Prentice Hall, 1994.
  2. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs).Prentice Hall PTR, 1999.
  3. Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004.
  4. Steve Kilts, “Advanced FPGA Design,” Wiley Inter-Science 

Course Content 

Unit I: INTRODUCTION TO ASICS, CMOS LOGIC AND ASIC LIBRARY DESIGN                                                                     

9 lecture hours

Types of ASICs – Design flow – CMOS transistors – Combinational Logic Cell – Sequential logic cell – Data path logic cell – Transistors as Resistors – Transistor Parasitic Capacitance- Logical effort.

Unit II: ASIC PHYSICAL DESIGN                                                             

10 lecture hours

System partition -partitioning – partitioning methods – interconnect delay models and measurement of delay – floor planning – placement – Routing: global routing – detailed routing – special routing – circuit extraction – DRC


10 lecture hours

Design systems – Logic Synthesis – Half gate ASIC -Schematic entry – Low level design language – PLA tools -EDIF- CFI design representation. Verilog and logic synthesis -VHDL and logic synthesis – types of simulation -boundary scan test – fault simulation – automatic test pattern generation.

Unit IV: PROGRAMMABLE ASICS, PROGRAMMABLE ASIC LOGIC CELLS AND PROGRAMMABLE ASIC I/O CELLS                                                      

9 lecture hours

Anti fuse – static RAM – EPROM and EEPROM technology – Actel ACT – Xilinx LCA –Altera FLEX – Altera MAX DC & AC inputs and outputs – Clock & Power inputs – Xilinx I/O blocks.

Unit V: FPGA                                                                                                   

9 lecture hours                                                                                  

Field Programmable gate arrays- Logic blocks, routing architecture, Design flow technology – mapping for FPGAs, Xilinx XC4000 – ALTERA’s FLEX 8000/10000, ACTEL’s ACT-1,2,3 and their speed performance

Mode of Evaluation: The theory and lab performance of students are evaluated separately. 

  Theory Laboratory Theory and laboratory
Components Internal SEE Internal SEE
Marks 50 50 50 50
Total Marks 100 100
Scaled Marks 75 25 100